1. Field of the Invention
The present invention relates to semiconductor fabrication, and in particular to copper interconnects with improved diffusion barrier and adhesion between conductors and dielectrics, and methods for fabricating the same.
2. Description of the Related Art
Aluminum and aluminum alloys were the most widely used interconnection metallurgies for integrated circuits. However, it has become more and more important that metal conductors that form the interconnections between devices as well as between circuits in a semiconductor have low resistivity for faster signal propagation. Copper is preferred for its low resistivity as well as for resistance to electromigration (EM) and stress voiding properties for very and ultra large scale integrated (VLSI and ULSI) circuits.
Conventionally, copper interconnects are formed using a so-called “damascene” or “dual-damascene” fabrication process instead of conventional aluminum interconnects. Briefly, a damascene metallization process forms conductive interconnects by deposition of conductive metals, i.e. copper or copper alloy, in via holes or trenches formed in a semiconductor wafer surface. However, copper implementation suffers from high diffusivity in common insulating materials such as silicon oxide, and oxygen-containing polymers, which causes corrosion of the copper with the attendant serious problems of loss of adhesion, delamination, voids, and consequently electric failure of circuitry. A copper diffusion barrier is therefore required for copper interconnects.
Currently, semiconductor devices (e.g., transistors) or conductive elements formed in a semiconductor substrate are typically covered with insulating materials, such as oxides. Selected regions of the oxide layer are removed and therefore create openings in the semiconductor substrate surface. A barrier layer is formed, lining the bottom and sidewalls of the openings for diffusion blocking and as an adhesion interface. A conductive seed layer, e.g. copper seed layer, is then formed upon the barrier layer. The seed layer provides a conductive foundation for a subsequently formed bulk copper interconnect layer typically formed by electroplating. After the bulk copper has been deposited excess copper is removed using, for example, chemical-mechanical polishing. The surface is then cleaned and sealed with a passivation layer or the like. Similar processes will be repeated to construct multi-level interconnects.
Currently, barrier materials, e.g. tantalum nitride, are deposited over an etched substrate using physical vapor deposition (PVD) or chemical vapor deposition (CVD) techniques. Barrier layer deposition by PVD has the advantage of creating barrier layer films of high purity and uniform chemical composition. The drawback of PVD techniques is the difficulty in obtaining good step coverage (a layer which evenly covers the underlying substrate is said to have good step coverage).
In order to further improve circuit performance, low dielectric constant (low-k) materials have been incorporated into the dielectric layers of modern integrated circuits to provide a lower capacitance than conventional silicon oxide and consequently, an increase in circuit speed. Common low-k dielectric materials include SOGs (spin-on-glasses) that are formed from alcohol soluble siloxanes or silicates which are spin-deposited and baked to form a relatively porous silicon oxide structure. Other porous silica structures such as xerogels have been developed, notably by Texas Instruments Inc. and incorporated into dual damascene processes to obtain dielectric layers with dielectric constants as low as 1.3. This is to be compared with a dielectric constant of about 4 for conventional silicon oxide.
Organic and quasi-organic materials such as polysilsesquioxanes, fluorinated silica glass (FSG) and fluorinated polyarylene ethers have been utilized as low-k and ultra low-k dielectric materials. Totally organic, non-silicaceous, materials such as the fluorinated polyarylene ethers, are used increasingly in semiconductor processing technology due to their favorable dielectric characteristics and ease of application. Organosilicate glass (OSGs), for example Black Diamond™, from Applied Materials Corporation of Santa Clara Calif., has dielectric constants as low as 2.6-2.8.
It is also found that TaN barrier films deposited directly onto certain low-k dielectric materials, in particular, fluorinated low-k materials such as FSGs and OSGs such as Black Diamond, exhibit poor adhesion. This results in delamination of the barrier material, either immediately after deposition or during subsequent processing. Delamination occurs due to by high tensile stresses as well as weak bonding between TaN barrier layers and low-k dielectric layers.
In addition to the requirements of the barrier mentioned above regarding the effectiveness against copper out diffusion, good coverage, good adhesion, barrier films must also be conformal, continuous, and as thin as possible to lower resistivity.